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  • harshw - Thursday, December 6, 2018 - link

    Shouldn’t the 8cx be compared to the A12X as the use case for the 8cx is for PCs and laptops? Do we have details for the die size for the A12X?
  • Death666Angel - Thursday, December 6, 2018 - link

    Will an A12X ever find its way into a non-Apple / MacOS / iOS based system?
    Will an 8ca ever find its way into an Apple / MacOS / iOS based system?
    I would be willing to bet a lot of money that no is the answer to both, so I don't see the reason to compare them to be very good.
  • defferoo - Thursday, December 6, 2018 - link

    two ARM SoCs in similar power envelopes, both on the same 7nm TSMC process shouldn't be compared? just because they're not directly competing against each other doesn't mean it wouldn't be interesting to compare them. they are indirectly competing of course, an ACPC is definitely competing against the cellular iPad. after hearing about this, first thing that popped into my mind was how it compares to A12X.
  • levizx - Friday, December 21, 2018 - link

    Yet A12 was listed, even further away from possibility.
  • name99 - Friday, December 7, 2018 - link

    Ideally yes. But no public die shots of the A12X yet exist...
  • Death666Angel - Thursday, December 6, 2018 - link

    One suggestion, mTr would make more sense as MTr. Million = 10^6 = Mega = M.
    m = milli = 10^-3.
    Otherwise, thanks a lot for the work. :D
  • levizx - Friday, December 21, 2018 - link

    Again, nonsense. It is 5.3 Billion Transistors in 94mm^2, so, 5300/94 Million Transistors/mm^2
    how would miliTr make any sense?
  • platinumjsi - Friday, December 7, 2018 - link

    How come Skylakes density is so low?
    I know TSMC 7nm is denser than Intel's 14nm but I didn't realize it was 6 - 7x denser?
  • shing3232 - Friday, December 7, 2018 - link

    Skylake is very high frequency design compare everything in the market that's why.
  • name99 - Friday, December 7, 2018 - link

    This just shows the bizarre incoherence of everything about Intel these days.
    What they make their serious money on it high-frequency designs, not dense designs. But in spite of that, their advertising is (was?) obsessed with boasting about density --- density that is irrelevant to most of what they sell.
    Even worse, they seem to have destroyed 10nm in an ever more obsessive push for that density! The 10nm disaster would make sense if they couched it in terms like "our goal was transistors + metal that allowed for 35% higher frequency", but that was not the public discussion, and it's not clear that it was the internal discussion.
  • Santoval - Friday, December 7, 2018 - link

    That number is indeed *way* too low. Intel has quoted 37.5 MTr/mm^2 for their 14nm process (and 2.7 times more for their 10nm process, i.e. ~101 MTr/mm^2). The relevant diagram -along with other comparisons of 14nm to 10nm- is in this pdf file, on the second page :
    https://newsroom.intel.com/newsroom/wp-content/upl...
  • name99 - Friday, December 7, 2018 - link

    Transistors (and more generally cells, and then entire designs) come in at least two forms - density optimized and frequency (ie speed/performance) optimized.
    The high intel density numbers (like that 100MTr/mm^2) refer to density optimized designs. The problem is --- that's irrelevant to most of what Intel ships. Sure it's probably relevant to Atom, but when you think Intel, you think i7 or Xeon, you don't think Atom.

    The density numbers for frequency optimized designs are lower on every process, but seem especially so on Intel.
  • edzieba - Monday, December 10, 2018 - link

    Intel mix transistor densities within the same die. Cores can use freq-opt transistors while uncore can use dense-opt.
  • Wilco1 - Friday, December 7, 2018 - link

    Transistor density of Intel CPUs has always been bad, hence all the marketing hype. No Intel chips can even achieve half their claimed marketing density!

    See eg. https://www.anandtech.com/show/9582/intel-skylake-... or https://en.wikipedia.org/wiki/Transistor_count for many more datapoints.

    The 22 core Broadwell E5 at ~15.8MTr/mm^2 gets about 40% the claimed 37.5MTr/mm^2 - most other Intel cores do around 13-14, or about a third the claimed density. Ryzen and Epyc achieve almost twice the density at 25MTr/mm^2. Note though that POWER 9 gets 11.5 on essentially the same process.

    Why is this the case? Both IBM and Intel use huge transistors to squeeze out every bit of performance, so density suffers badly. On the other hand AMD proves one can achieve 4+GHz at almost twice the density.

    This huge deficit in density was the reason Intel pushed density too far too quickly with 10nm (and 7nm) "hyperscaling". When 10nm finally goes to production it will likely have a far less ambitious density.
  • nismotigerwvu - Friday, December 7, 2018 - link

    Moore's Law is a crazy thing. I remember being floored when AMD built the first gen Bulldozer chips from 1.2 billion transistors and now we have MOBILE SoCs packing nearly 5 fold more into a tiny die that draws 50 times less power.

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